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Jr Digital Design Engineer with Security Clearance

Company: Leidos
Location: Saint Petersburg
Posted on: November 11, 2018

Job Description:

Job Description: We are seeking upcoming and recent grads to join our team! The Advanced Solutions Group (ASG) at Leidos currently has an opening for a Jr Digital Design Engineer to work in our St. Petersburg, FL office. This is an exciting opportunity to use your knowledge and experience designing communication and electronic systems among various projects. This job will focus on the digital design aspects of Embedded Systems Design and will provide exposure to the entire lifecycle of the design process. The Leidos facility in St. Petersburg provides design, development, modeling and simulation, analysis, prototyping and testing of advanced electronic systems, with a focus on embedded communication systems, Software Defined Radios and Phased Array Antenna Systems to various DOD and commercial customers. Roles and Responsibilities: * Participate in designing, developing and testing sophisticated electronic communications hardware and firmware. * Perform Logic Design; write VHDL code, logic simulation, synthesis and testing for use within FPGA/CPLD devices along with documentation to support the designs. * Review and analyze requirements, participate in defining, deriving and allocating hardware requirements. * Translate conceptual designs into detailed design specifications, electrical schematics, complete bills of materials (BOMs) and Printed Circuit Board Design (PCB) layout techniques, documents and drawings. * Provide technical support for all phases of a project including scheduling, design, system test, cost estimates, engineering specifications and various drawings. * Involved with testing and integration of hardware and software/firmware within complex electronic systems. * Troubleshoot, improve and optimize designs from prototypes to matured products. Requirements: * BS in Electrical or Computer Engineering with 0 - 2 years of experience with Digital Design. * Must be US Citizen and able to obtain and maintain a Secret Security Clearance. * Knowledge of Digital logic design using VHDL with FPGA's, CPLD/s, and/or Microcontrollers and associated tools (like Xilinx Vivado or Altera equivalent) * Knowledge of VHDL simulation - using part vendor tools or third party (Xilinx simulator, Active HDL, ModelSim etc.) * Familiar with software languages like C/C++, Java, MATLAB etc. * Familiar with schematic capture tools like Orcad Capture or equivalent. * Basic knowledge of various test equipment - Oscilloscope, Voltmeter, Logic Analyzer * Self-motivated individual with excellent oral and written communication skills who pays close attention to detail. * Able to work and collaborate within a multidisciplinary engineering environment. Secret

Keywords: Leidos, St. Petersburg , Jr Digital Design Engineer with Security Clearance, Engineering , Saint Petersburg, Florida

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